thumb|right|Annotated die photo of a Fairchild chip

The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together. It is the primary process by which silicon integrated circuit chips are built, and it is the most commonly used method of producing junctions during the manufacture of semiconductor devices. The process utilizes the surface passivation and thermal oxidation methods.

The planar process was developed at Fairchild Semiconductor in 1959 and process proved to be one of the most important single advances in semiconductor technology. In 1957, Frosch and Derick were able to manufacture the first silicon dioxide field effect transistors, the first transistors in which drain and source were adjacent at the surface, showing that silicon dioxide surface passivation protected and insulated silicon wafers.

At Bell Labs, the importance of Frosch's technique was immediately realized. Results of theirs circulated around Bell Labs in the form of BTL memos before being published in 1957. At Shockley Semiconductor, Shockley had circulated the preprint of their article in December 1956 to all his senior staff, including Jean Hoerni. Later, Hoerni attended a meeting where Atalla presented a paper about passivation based on the previous results at Bell Labs. K. E. Daburlos and H. J. Patterson of Bell Laboratories continued on the efforts of C. Frosch and L. Derick, and developed a process similar to Hoerni’s about the same time. Noyce's invention was the first monolithic IC chip.

Early versions of the planar process used a photolithography process using near-ultraviolet light from a mercury vapor lamp.

As of 2011, small features are typically made with 193 nm "deep" UV lithography. As of 2022, the ASML NXE platform uses 13.5 nm extreme ultraviolet (EUV) light, generated by a tin-based plasma source, as part of the extreme ultraviolet lithography process.

See also

  • Semiconductor device fabrication

References

  • A compendium of articles and other information on the development of integrated circuits, including the development of oxide masking, photolithography, the advent of silicon, the integrated circuit and the planar process.
  • The Planar Process
  • An overview of the steps in fabrication of an integrated circuit from the Nobel Prize website. This is a section of the work Techville: The integrated circuit.