The following is a list of 7400-series digital logic integrated circuits. In the mid-1960s, the original 7400-series integrated circuits were introduced by Texas Instruments with the prefix "SN" to create the name SN74xx. Due to the popularity of these parts, other manufacturers released pin-to-pin compatible logic devices and kept the 7400 sequence number as an aid to identification of compatible parts. However, other manufacturers use different prefixes and suffixes on their part numbers.

Overview

Some TTL logic parts were made with an extended military-specification temperature range. These parts are prefixed with 54 instead of 74 in the part number.

A short-lived 64 prefix on Texas Instruments parts indicated an industrial temperature range; this prefix had been dropped from the TI literature by 1973. Most recent 7400-series parts are fabricated in CMOS or BiCMOS technology rather than TTL. Surface-mount parts with a single gate (often in a 5-pin or 6-pin package) are prefixed with 741G instead of 74.

Some manufacturers released some 4000-series equivalent CMOS circuits with a 74 prefix, for example, the 74HC4066 was a replacement for the 4066 with slightly different electrical characteristics (different power-supply voltage ratings, higher frequency capabilities, lower "on" resistances in analog switches, etc.). See List of 4000-series integrated circuits.

Conversely, the 4000-series has "borrowed" from the 7400 series such as the CD40193 and CD40161 being pin-for-pin functional replacements for 74C193 and 74C161.

Older TTL parts made by manufacturers such as Signetics, Motorola, Mullard and Siemens may have different numeric prefix and numbering series entirely, such as in the European FJ family FJH101 is an 8-input NAND gate like a 7430.

A few alphabetic characters to designate a specific logic subfamily may immediately follow the 74 or 54 in the part number, e.g., 74LS74 for low-power Schottky. Some CMOS parts such as 74HCT74 for high-speed CMOS with TTL-compatible input thresholds are functionally similar to the TTL part. Not all functions are available in all families.

The generic descriptive feature of these alphabetic characters was diluted by various companies participating in the market at its peak and are not always consistent especially with more recent offerings. The National Semiconductor trademarks of the words FAST and FACT are usually cited in the descriptions from other companies when describing their own unique designations.

In a few instances, such as the 7478 and 74107, the same suffix in different families do not have completely equivalent logic functions.

Another extension to the series is the 7416xxx variant, representing mostly the 16-bit-wide counterpart of otherwise 8-bit-wide "base" chips with the same three ending digits. Thus e.g. a "7416373" would be the 16-bit-wide equivalent of a "74373". Some 7416xxx parts, however, do not have a direct counterpart from the standard 74xxx range but deliver new functionality instead, which needs making use of the 7416xxx series' higher pin count. For more details, refer primarily to the Texas Instruments documentation mentioned in the References section.

For CMOS (AC, HC, etc.) subfamilies, read "open drain" for "open collector" in the table below.

There are a few numeric suffixes that have multiple conflicting assignments, such as the 74453.

Logic gates

thumb|right|Schematic of 74LS51 IC consists of a 3-3 AOI gate and 2-2 AOI gate. AOI means [[AND-OR-Invert (AND-NOR). Most AOI chips are currently obsolete.]]

thumb|74LS51 pinout diagram

thumb|TI SN74LS51 in DIP-14 package

Since there are numerous 7400-series parts, the following groups related parts to make it easier to pick a useful part number. This section only includes combinational logic gates.

For part numbers in this section, "x" is the 7400-series logic family, such as LS, ALS, HCT, AHCT, HC, AHC, LVC, ...

;Normal inputs / push–pull outputs

:{| class="wikitable"

|-

! Configuration !! Buffer !! Inverter

|-

| Hex 1-input || 74x34 || 74x04

|}

:{| class="wikitable"

|-

! Configuration !! AND !! NAND !! OR !! NOR !! XOR !! XNOR

|-

| Quad 2-input || 74x08 || 74x00 || 74x32 || 74x02 || 74x86 || 74x7266

|-

| Triple 3-Input || 74x11 || 74x10 || 74x4075 || 74x27 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|-

| Dual 4-input || 74x21 || 74x20 || 74x4072 || 74x29 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|-

| Single 8-input || style="background: grey; text-align: center;" | n/a || 74x30 || 74x4078 || 74x4078 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|}

;Schmitt-trigger inputs / push–pull outputs

:{| class="wikitable"

|-

! Configuration !! Buffer !! Inverter

|-

| Hex 1-input || 74x7014 || 74x14

|}

:{| class="wikitable"

|-

! Configuration !! AND !! NAND !! OR !! NOR

|-

| Quad 2-input || 74x7001 || 74x132 || 74x7032 || 74x7002

|-

| Dual 4-input || style="background: grey; text-align: center;" | n/a || 74x13 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|}

;Normal inputs / open-collector outputs

:{| class="wikitable"

|-

! Configuration !! Buffer !! Inverter

|-

| Hex 1-input || 74x07 || 74x05

|}

:{| class="wikitable"

|-

! Configuration !! AND !! NAND !! OR !! NOR !! XOR !! XNOR

|-

| Quad 2-input || 74x09 || 74x03 || style="background: grey; text-align: center;" | n/a || 74x33 || 74x136 || 74x266

|-

| Triple 3-input || 74x15 || 74x12 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|-

| Dual 4-input || style="background: grey; text-align: center;" | n/a || 74x22 || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a || style="background: grey; text-align: center;" | n/a

|}

;Schmitt-trigger inputs / three-state outputs

:{| class="wikitable"

|-

! Configuration !! Buffer

!Inverter

|-

| Octal 1-input || 74x241<br/>74x244

| 74x240

|}

;AND-OR-invert (AOI) logic gates

: NOTE: in past decades, a number of AND-OR-invert (AOI) parts were available in 7400 TTL families, but currently most are obsolete.

  • SN5450 = dual 2-2 AOI gate, one is expandable (SN54 is military version of SN74)
  • SN74LS51 = 2-2 AOI gate and 3-3 AOI gate
  • SN54LS54 = single 2-3-3-2 AOI gate

Larger footprints

Parts in this section have a pin count of 14 pins or more. The lower part numbers were established in the 1960s and 1970s, then higher part numbers were added incrementally over decades. IC manufacturers continue to make a core subset of this group, but many of these part numbers are considered obsolete and no longer manufactured. Older discontinued parts may be available from a limited number of sellers as new old stock (NOS), though some are much harder to find.

For the following table:

  • Part number column the "x" is a place holder for the logic subfamily name. For example, 74x00 in "LS" logic family would be "74LS00".
  • Description column simplified to make it easier to sort, thus isn't identical to datasheet title. The terms Schmitt trigger, open-collector/open-drain, three-state were moved to the input and output columns to make it easier to sort by those features.
  • Input column a blank cell means a normal input for the logic family type.
  • Output column a blank cell means a "totem pole" output, also known as a push–pull output, with the ability to drive ten standard inputs of the same logic subfamily (fan-out N<sub>O</sub>&nbsp;=&nbsp;10). Outputs with higher output currents are often called drivers or buffers.
  • Pins column number of pins for the dual in-line package (DIP) version; a number in parentheses (round brackets) indicates that there is no known dual in-line package version of this IC.

{|class="wikitable sortable"

!

! Units !! Description !! Input !! Output !! Pins !! Datasheet

|-

| 74x00

| 4

| quad 2-input NAND gate

|

|

| 14

| SN74LS00

|-

| 74x01

| 4

| quad 2-input NAND gate; different pinout for 74H01

|

| open-collector

| 14

| SN74LS01

|-

| 74x02

| 4

| quad 2-input NOR gate

|

|

| 14

| SN74LS02

|-

| 74x03

| 4

| quad 2-input NAND gate

|

| open-collector

| 14

| SN74LS03

|-

| 74x04

| 6

| hex inverter gate

|

|

| 14

| SN74LS04

|-

| 74x05

| 6

| hex inverter gate

|

| open-collector

| 14

| SN74LS05

|-

| 74x06

| 6

| hex inverter gate

|

| open-collector 30&nbsp;V / 40&nbsp;mA

| 14

| SN74LS06

|-

| 74x07

| 6

| hex buffer gate

|

| open-collector 30&nbsp;V / 40&nbsp;mA

| 14

| SN74LS07

|-

| 74x08

| 4

| quad 2-input AND gate

|

|

| 14

| SN74LS08

|-

| 74x09

| 4

| quad 2-input AND gate

|

| open-collector

| 14

| SN74LS09

|-

| 74x10

| 3

| triple 3-input NAND gate

|

|

| 14

| SN74LS10

|-

| 74x11

| 3

| triple 3-input AND gate

|

|

| 14

| SN74LS11

|-

| 74x12

| 3

| triple 3-input NAND gate

|

| open-collector

| 14

| SN74LS12

|-

| 74x13

| 2

| dual 4-input NAND gate

| Schmitt trigger

|

| 14

| SN74LS13<!--December2019-->

|-

| 74x14

| 6

| hex inverter gate

| Schmitt trigger

|

| 14

| SN74LS14

|-

| 74x15

| 3

| triple 3-input AND gate

|

| open-collector

| 14

| SN74LS15

|-

| 74x16

| 6

| hex inverter gate

|

| open-collector 15&nbsp;V / 40&nbsp;mA

| 14

| SN7416

|-

| 74x17

| 6

| hex buffer gate

|

| open-collector 15&nbsp;V / 40&nbsp;mA

| 14

| SN7417

|-

| 74x18

| 2

| dual 4-input NAND gate

| Schmitt trigger

|

| 14

| SN74LS18<!--July2018-->

|-

| 74x19

| 6

| hex inverter gate

| Schmitt trigger

|

| 14

| SN74LS19<!--July2018-->

|-

| 74x20

| 2

| dual 4-input NAND gate

|

|

| 14

| SN74LS20

|-

| 74x21

| 2

| dual 4-input AND gate

|

|

| 14

| SN74LS21

|-

| 74x22

| 2

| dual 4-input NAND gate

|

| open-collector

| 14

| SN74LS22

|-

| 74x23

| 2

| dual 4-input NOR gate with strobe, one gate expandable with 74x60

|

|

| 16

| SN7423

|-

| 74x24

| 4

| quad 2-input NAND gate

| Schmitt trigger

|

| 14

| SN74LS24<!--July2018-->

|-

| 74x25

| 2

| dual 4-input NOR gate with strobe

|

|

| 14

| SN7425

|-

| 74x26

| 4

| quad 2-input NAND gate

|

| open-collector 15&nbsp;V

| 14

| SN74LS26

|-

| 74x27

| 3

| triple 3-input NOR gate

|

|

| 14

| SN74LS27

|-

| 74x28

| 4

| quad 2-input NOR gate

|

| driver N<sub>O</sub>=30

| 14

| SN74LS28

|-

| 74x29

| 2

| dual 4-input NOR gate

|

|

| 14

| US7429A

|-

| 74x30

| 1

| single 8-input NAND gate

|

|

| 14

| SN74LS30

|-

| 74x31

| 6

| hex delay elements (two 6ns, two 23-32ns, two 45-48ns)

|

|

| 16

| SN74LS31

|-

| 74x32

| 4

| quad 2-input OR gate

|

|

| 14

| SN74LS32

|-

| 74x33

| 4

| quad 2-input NOR gate

|

| open-collector driver N<sub>O</sub>=30

| 14

| SN74LS33

|-

| 74x34

| 6

| hex buffer gate

|

|

| 14

| MM74HC34

|-

| 74x35

| 6

| hex buffer gate

|

| open-collector

| 14

| SN74ALS35

|-

| 74x36

| 4

| quad 2-input NOR gate (different pinout than 7402)

|

|

| 14

| SN74HC36

|-

| 74x37

| 4

| quad 2-input NAND gate

|

| driver N<sub>O</sub>=30

| 14

| SN74LS37

|-

| 74x38

| 4

| quad 2-input NAND gate

|

| open-collector driver N<sub>O</sub>=30

| 14

| SN74LS38

|-

| 74x39

| 4

| quad 2-input NAND gate (different pinout than 7438)

|

| open-collector 60&nbsp;mA

| 14

| SN7439

|-

| 74x40

| 2

| dual 4-input NAND gate

|

| driver N<sub>O</sub>=30

| 14

| SN74LS40

|-

| 74x41

| 1

| BCD to decimal decoder / Nixie tube driver

|

| open-collector 70&nbsp;V

| 16

| DM7441A<!--July2018-->

|-

| 74x42

| 1

| BCD to decimal decoder

|

|

| 16

| SN74LS42

|-

| 74x43

| 1

| excess-3 to decimal decoder

|

|

| 16

| SN7443A<!--July2018-->

|-

| 74x44

| 1

| Gray code to decimal decoder

|

|

| 16

| SN7444A<!--July2018-->

|-

| 74x45

| 1

| BCD to decimal decoder/driver

|

| open-collector 30&nbsp;V / 80&nbsp;mA

| 16

| SN7445

|-

| 74x46

| 1

| BCD to 7-segment display decoder/driver

|

| open-collector 30&nbsp;V

| 16

| SN7446A<!--January 2020-->

|-

| 74x47

| 1

| BCD to 7-segment decoder/driver

|

| open-collector 15&nbsp;V

| 16

| SN74LS47

|-

| 74x48

| 1

| BCD to 7-segment decoder/driver

|

| open-collector, 2&nbsp;kΩ pull-up

| 16

| SN74LS48<!--January 2020-->

|-

| 74x49

| 1

| BCD to 7-segment decoder/driver

|

| open-collector

| 14

| SN74LS49<!--January 2020-->

|-

| 74x50

| 2

| dual 2-2-input AND-OR-Invert gate, one gate expandable

|

|

| 14

| SN7450

|-

| 7451, 74H51, 74S51

| 2

| dual 2-2-input AND-OR-Invert (AOI) gate

|

|

| 14

| SN7451

|-

| 74L51, 74LS51

| 2

| 3-3-input AND-OR-Invert gate and 2-2-input AND-OR-Invert gate

|

|

| 14

| SN74LS51

|-

| 74x52

| 1

| 3-2-2-2-input AND-OR gate, expandable with 74x61

|

|

| 14

| SN74H52<!--July2018-->

|-

| 7453

| 1

| 2-2-2-2-input AND-OR-Invert gate, expandable

|

|

| 14

| SN7453<!--July2018-->

|-

| 74H53

| 1

| 3-2-2-2-input AND-OR-Invert gate, expandable

|

|

| 14

| SN74H53<!--July2018-->

|-

| 7454

| 1

| 2-2-2-2-input AND-OR-Invert gate

|

|

| 14

| SN7454

|-

| 74H54

| 1

| 3-2-2-2-input AND-OR-Invert gate

|

|

| 14

| SN74H54

|-

| 74L54, 74LS54

| 1

| 3-3-2-2-input AND-OR-Invert gate

|

|

| 14

| SN74LS54

|-

| 74x55

| 1

| 4-4-input AND-OR-Invert gate, 74H55 is expandable

|

|

| 14

| SN74LS55<!--July2018-->

|-

| 74x56

| 1

| 50:1 frequency divider

|

|

| 8

| SN74LS56<!--July2018-->

|-

| 74x57

| 1

| 60:1 frequency divider

|

|

| 8

| SN74LS57<!--July2018-->

|-

| 74x58

| 2

| 3-3-input AND-OR gate and 2-2-input AND-OR gate

|

|

| 14

| 74HC58<!--July2018-->

|-

| 74x59

| 2

| dual 3-2-input AND-OR-Invert gate

|

|

| 14

| US7459A

|-

| 74x60

| 2

| dual 4-input expander for 74x23, 74x50, 74x53, 74x55

|

|

| 14

| SN7460

|-

| 74x61

| 3

| triple 3-input expander for 74x52

|

|

| 14

| SN74H61<!--July2018-->

|-

| 74x62

| 1

| 3-3-2-2-input AND-OR expander for 74x50, 74x53, 74x55

|

|

| 14

| SN74H62<!--July2018-->

|-

| 74x63

| 6

| hex current sensing interface gates

|

|

| 14

| SN74LS63<!--July2018-->

|-

| 74x64

| 1

| 4-3-2-2-input AND-OR-Invert gate

|

|

| 14

| SN74S64

|-

| 74x65

| 1

| 4-3-2-2 input AND-OR-Invert gate

|

| open-collector

| 14

| SN74S65

|-

| 74x67

| 1

| AND gated J-K master-slave flip-flop, asynchronous preset and clear (improved 74L72)

|

|

| (16)

| BL54L67Y

|-

| 74L68

| 2

| dual J-K flip-flop, asynchronous clear (improved 74L73)

|

|

| (18)

| BL54L68Y

|-

| 74LS68

| 2

| dual 4-bit decade counters

|

|

| 16

| SN74LS68<!--July2018-->

|-

| 74L69

| 2

| dual J-K flip-flop, asynchronous preset, shared clock and clear

|

|

| (18)

| BL54L69Y

|-

| 74LS69

| 2

| dual 4-bit binary counters

|

|

| 16

| SN74LS69<!--July2018-->

|-

| 74x70

| 1

| AND-gated positive-edge-triggered J-K flip-flop, asynchronous preset and clear

|

|

| 14

| SN7470<!--July2018-->

|-

| 74H71

| 1

| AND-OR-gated J-K master-slave flip-flop, preset

|

|

| 14

| SN74H71<!--July2018-->

|-

| 74L71

| 1

| AND-gated R-S master-slave flip-flop, preset and clear

|

|

| 14

| SN54L71<!--July2018-->

|-

| 74x72

| 1

| AND gated J-K master-slave flip-flop, asynchronous preset and clear

|

|

| 14

| SN7472

|-

| 74x73

| 2

| dual J-K flip-flop, asynchronous clear

|

|

| 14

| SN54LS73A

|-

| 74x74

| 2

| dual D positive-edge-triggered flip-flop, asynchronous clear & preset, Q & /Q outputs

|

|

| 14

| SN74LS74A

|-

| 74x75

| 1

| 4-bit bistable latch, complementary outputs

|

|

| 16

| SN74LS75

|-

| 74x76

| 2

| dual J-K flip-flop, asynchronous preset and clear

|

|

| 16

| SN74LS76A

|-

| 74x77

| 1

| 4-bit bistable latch

|

|

| 14

| SN54LS77

|-

| 74H78

| 2

| dual positive-pulse-triggered J-K flip-flop, preset, shared clock and clear

|

|

| 14

| SN74H78<!--July2018-->

|-

| 74L78

| 2

| dual positive-pulse-triggered J-K flip-flop, preset, shared clock and clear

|

|

| 14

| SN54L78<!--July2018-->

|-

| 74LS78

| 2

| dual negative-edge-triggered J-K flip-flop, preset, shared clock and clear

|

|

| 14

| SN74LS78A<!--July2018-->

|-

| 74x79

| 2

| dual D positive-edge-triggered flip-flop, asynchronous preset and clear

|

|

| 14

| MC7479

|-

| 74x80

| 1

| gated full adder

|

|

| 14

| SN7480<!--July2018-->

|-

| 74x81

| 1

| 16-bit RAM

|

|

| 14

| SN7481A

|-

| 74x82

| 1

| 2-bit binary full adder

|

|

| 14

| SN7482<!--July2018-->

|-

| 74x83

| 1

| 4-bit binary full adder

|

|

| 16

| SN74LS83A<!--July2018-->

|-

| 74x84

| 1

| 16-bit RAM

|

|

| 16

| SN7484A

|-

| 74x85

| 1

| 4-bit magnitude comparator

|

|

| 16

| SN74LS85

|-

| 74x86

| 4

| quad 2-input XOR gate

|

|

| 14

| SN74LS86A

|-

| 74x87

| 1

| 4-bit true/complement/zero/one element

|

|

| 14

| SN74H87<!--July2018-->

|-

| 74x88

| 1

| 256-bit ROM (32x8)

|

| open-collector

| 16

| SN7488A<!--July2018-->

|-

| 74x89

| 1

| 64-bit RAM (16x4), 4 data inputs, 4 inverted data outputs

|

| open-collector

| 16

| SN7489

|-

| 74x90

| 1

| decade counter (separate divide-by-2 and divide-by-5 sections)

|

|

| 14

| SN74LS90

|-

| 74x91

| 1

| 8-bit shift register, serial in, serial out, gated input

|

|

| 14

| SN74LS91<!--July2018-->

|-

| 74x92

| 1

| divide-by-12 counter (separate divide-by-2 and divide-by-6 sections)

|

|

| 14

| SN74LS92

|-

| 74x93

| 1

| 4-bit binary counter (separate divide-by-2 and divide-by-8 sections); different pinout for 74L93

|

|

| 14

| SN74LS93

|-

| 74x94

| 1

| 4-bit shift register, dual asynchronous presets

|

|

| 16

| SN7494<!--July2018-->

|-

| 74x95

| 1

| 4-bit shift register, parallel in, parallel out, serial input; different pinout for 74L95

|

|

| 14

| SN74LS95B

|-

| 74x96

| 1

| 5-bit parallel-in/parallel-out shift register, asynchronous preset

|

|

| 16

| SN74LS96<!--July2018-->

|-

| 74x97

| 1

| synchronous 6-bit binary rate multiplier

|

|

| 16

| SN7497

|-

| 74x98

| 1

| 4-bit data selector/storage register

|

|

| 16

| SN54L98<!--July2018-->

|-

| 74x99

| 1

| 4-bit bidirectional universal shift register

|

|

| 16

| SN54L99<!--July2018-->

|-

!

! Units !! Description !! Input !! Output !! Pins !! Datasheet

|-

| 74x100

| 2

| dual 4-bit bistable latch

|

|

| 24

| SN74100

|-

| 74x101

| 1

| AND-OR-gated J-K negative-edge-triggered flip-flop, preset

|

|

| 14

| SN74H101

|-

| 74x102

| 1

| AND-gated J-K negative-edge-triggered flip-flop, preset and clear

|

|

| 14

| SN74H102

|-

| 74x103

| 2

| dual J-K negative-edge-triggered flip-flop, clear

|

|

| 14

| SN74H103

|-

| 74x104

| 1

| J-K master-slave flip-flop

|

|

| 14

| SN74104

|-

| 74x105

| 1

| J-K master-slave flip-flop, J2 and K2 inverted

|

|

| 14

| SN74105

|-

| 74x106

| 2

| dual J-K negative-edge-triggered flip-flop, preset and clear

|

|

| 16

| SN74H106

|-

| 74x107

| 2

| dual J-K flip-flop, clear

|

|

| 14

| SN74LS107A

|-

| 74x108

| 2

| dual J-K negative-edge-triggered flip-flop, preset, shared clock and clear

|

|

| 14

| SN74H108

|-

| 74x109

| 2

| dual J-NotK positive-edge-triggered flip-flop, clear and preset

|

|

| 16

| SN74LS109A

|-

| 74x110

| 1

| AND-gated J-K master-slave flip-flop, data lockout

|

|

| 14

| SN74110

|-

| 74x111

| 2

| dual J-K master-slave flip-flop, data lockout, reset, set

|

|

| 16

| SN74111

|-

| 74x112

| 2

| dual J-K negative-edge-triggered flip-flop, clear & preset, Q & /Q outputs

|

|

| 16

| SN74LS112A

|-

| 74x113

| 2

| dual J-K negative-edge-triggered flip-flop, preset

|

|

| 14

| SN74LS113A

|-

| 74x114

| 2

| dual J-K negative-edge-triggered flip-flop, preset, shared clock and clear

|

|

| 14

| SN74LS114A

|-

| 74x115

| 2

| dual J-K master-slave flip-flop, data lockout, reset

|

|

| 14

| TL74115N

|-

| 74116, 74L116

| 2

| dual 4-bit latch, clear

|

|

| 24

| SN74116

|-

| 74H116

| 1

| AND-gated J-K flip flop

|

|

| 14

| MC74H116

|-

| 74x117

| 1

| AND-gated J-K flip flop, one J and K input inverted

|

|

| 14

| MC74H117

|-

| 74x118

| 6

| hex set/reset latch, shared reset

|

|

| 16

| ITT74118

|-

| 74119

| 6

| hex set/reset latch

|

|

| 24

| TL74119N

|-

| 74S416

| 1

| 4-bit bidirectional bus transceiver, non-inverting (equivalent to Intel 8216)

|

| three-state

| 16

| UCY74S416

|-

| 74x417

| 2

| modulo 2 and modulo 5 counters, shared preload and clear inputs

|

|

| 16

| MC74417

|-

| 74418

| 1

| modulo 16 counter, preload and clear inputs

|

|

| 16

| MC74418

|-

| 74x516

| 1

| 16-bit multiplier/divider

|

|

| 24

| SN74S516

|-

| 74x518

| 1

| 8-bit comparator

| 20&nbsp;kΩ pull-up

| open-collector

| 20

| SN74ALS518

|-

| 74x519

| 1

| 8-bit comparator

|

| open-collector

| 20

| SN74ALS519

|-

| 74x520

| 1

| 8-bit comparator, inverting output

| 20&nbsp;kΩ pull-up

|

| 20

| SN74ALS520

|-

| 74x521

| 1

| 8-bit comparator, inverting output

|

|

| 20

| SN74ALS521

|-

| 74x522

| 1

| 8-bit comparator, inverting output

| 20&nbsp;kΩ pull-up

| open-collector

| 20

| SN74ALS522

|-

| 74x524

| 1

| 8-bit registered comparator

|

| open-collector

| 20

| 74F524

|-

| 74x525

| 1

| 16-bit programmable counter

|

|

| 28

| 74F525

|-

| 74x526

| 1

| fuse programmable identity comparator, 16-bit

|

|

| 20

| SN74ALS526

|-

| 74x527

| 1

| fuse programmable identity comparator, 8-bit + 4-bit conventional Identity comparator

|

|

| 20

| SN74ALS527

|-

| 74x528

| 1

| fuse programmable Identity comparator, 12-bit

|

|

| 16

| SN74ALS528

|-

| 74x531

| 8

| octal transparent latch

|

| three-state

| 20

| SN74S531

|-

| 74x532

| 8

| octal register

|

| three-state

| 20

| SN74S532

|-

| 74x533

| 1

| octal D-type transparent latch, inverting outputs

|

| three-state

| 20

| SN74ALS533A

|-

| 74x534

| 1

| octal D-type edge-triggered flip-flop, inverting outputs, shared clock and output enable

|

| three-state

| 20

| SN74ALS534A

|-

| 74x535

| 1

| octal transparent latch, inverting outputs

|

| three-state

| 20

| SN74S535

|-

| 74x536

| 1

| octal register, inverting outputs

|

| three-state

| 20

| SN74S536

|-

| 74x537

| 1

| BCD to decimal decoder

|

| three-state

| 20

| MC74F537

|-

| 74x538

| 1

| 3-to-8 line decoder/demultiplexer

|

| three-state

| 20

| SN74ALS538

|-

| 74x539

| 2

| dual 2-to-4 line decoder/demultiplexer

|

| three-state

| 20

| SN74ALS539

|-

| 74x540

| 1

| octal buffer, inverting outputs

| Schmitt trigger

| three-state

| 20

| SN74LS540

|-

| 74x541

| 1

| octal buffer, non-inverting outputs

| Schmitt trigger

| three-state

| 20

| SN74LS541

|-

| 74x543

| 1

| octal registered transceiver, non-inverting

|

| three-state

| 24

| SN74F543

|-

| 74x544

| 1

| octal registered transceiver, inverting

|

| three-state

| 24

| MC74F544

|-

| 74x545

| 1

| octal bidirectional transceiver, non-inverting

|

| three-state

| 20

| 74F545

|-

| 74x546

| 1

| 8-bit bidirectional registered transceiver, non-inverting

|

| three-state

| 24

| SN74LS546

|-

| 74LS547

| 1

| 8-bit bidirectional latched transceiver, non-inverting

|

| three-state

| 24

| SN74LS547

|-

| 74F547

| 1

| 3-to-8 line decoder/demultiplexer with address latches and acknowledge output

|

|

| 20

| 74F547

|-

| 74LS548

| 1

| 8-bit two-stage pipelined register

|

| three-state

| 24

| SN74LS548

|-

| 74F548

| 1

| 3-to-8 line decoder/demultiplexer with acknowledge output

|

|

| 20

| 74F548

|-

| 74x549

| 1

| 8-bit two-stage pipelined latch

|

| three-state

| 24

| SN74LS549

|-

| 74x550

| 1

| octal registered transceiver with status flags, non-inverting

|

| three-state

| 28

| 74F550

|-

| 74x551

| 1

| octal registered transceiver with status flags, inverting

|

| three-state

| 28

| 74F551

|-

| 74x552

| 1

| octal registered transceiver with parity and flags

|

| three-state

| 28

| 74F552

|-

| 74x556

| 1

| 16x16-bit multiplier slice

|

| three-state

| (84)

| 74S556

|-

| 74x557

| 1

| 8-bit by 8-bit multiplier

|

| three-state

| 40

| SN74S557

|-

| 74x558

| 1

| 8-bit by 8-bit multiplier

|

| three-state

| 40

| SN74S558

|-

| 74x559

| 1

| 8-bit expandable two's complement multiplier/divider

|

| three-state

| 24

| 74F559

|-

| 74x560

| 1

| 4-bit decade counter

|

| three-state

| 20

| SN74ALS560A

|-

| 74x561

| 1

| synchronous 4-bit binary counter

|

| three-state

| 20

| SN74ALS561A

|-

| 74x563

| 1

| octal D-type transparent latch, inverting outputs

|

| three-state

| 20

| SN74ALS563B

|-

| 74x564

| 1

| octal D-type edge-triggered flip-flop, inverting outputs, shared clock and output enable

|

| three-state

| 20

| SN74ALS564B

|-

| 74x566

| 1

| 8-bit bidirectional registered transceiver, inverting

|

| three-state

| 24

| SN74LS566

|-

| 74x567

| 1

| 8-bit bidirectional latched transceiver, inverting

|

| three-state

| 24

| SN74LS567

|-

| 74x568

| 1

| decade up/down counter

|

| three-state

| 20

| SN74ALS568A

|-

| 74x569

| 1

| binary up/down counter

|

| three-state

| 20

| SN74ALS569A

|-

| 74x570

| 1

| 2048-bit PROM (512x4)

|

| open-collector

| 16

| DM74S570

|-

| 74x571

| 1

| 2048-bit PROM (512x4)

|

| three-state

| 16

| DM74S571

|-

| 74x572

| 1

| 4096-bit PROM (1024x4)

|

| open-collector

| 18

| DM74S572

|-

| 74x573

| 1

| octal D-type transparent latch

|

| three-state

| 20

| SN74ALS573C

|-

| 74x574

| 1

| octal D-type edge-triggered flip-flop

|

| three-state

| 20

| SN74ALS574B

|-

| 74x575

| 1

| octal D-type edge-triggered flip-flop, synchronous clear

|

| three-state

| 24

| SN74ALS575A

|-

| 74x576

| 1

| octal D-type edge-triggered flip-flop, inverting outputs

|

| three-state

| 20

| SN74ALS576B

|-

| 74x577

| 1

| octal D-type edge-triggered flip-flop, synchronous clear, inverting outputs

|

| three-state

| 24

| SN74ALS577A

|-

| 74x579

| 1

| 8-bit bidirectional binary counter

|

| three-state

| 20

| MC74F579

|-

| 74x580

| 1

| octal D-type transparent latch, inverting outputs

|

| three-state

| 20

| SN74ALS580B

|-

| 74x582

| 1

| 4-bit BCD arithmetic logic unit

|

|

| 24

| 74F582

|-

| 74x583

| 1

| 4-bit BCD adder

|

|

| 16

| 74F583

|-

| 74x588

| 1

| octal bidirectional transceiver with IEEE-488 termination resistors

|

| three-state

| 20

| 74F588

|-

| 74x589

| 1

| 8-bit shift register, input latch

|

| three-state

| 16

| SN74LS589

|-

| 74x590

| 1

| 8-bit binary counter, output registers

|

| three-state

| 16

| SN74LS590

|-

| 74x591

| 1

| 8-bit binary counter, output registers

|

| open-collector

| 16

| SN74LS591

|-

| 74x592

| 1

| 8-bit binary counter, input registers

|

|

| 16

| SN74LS592

|-

| 74x593

| 1

| 8-bit binary counter, input registers

|

| three-state

| 20

| SN74LS593

|-

| 74x594

| 1

| 8-bit shift registers, serial-in, parallel-out, output latches

|

| buffered

| 16

| SN74LS594

|-

| 74x595

| 1

| 8-bit shift registers, serial-in, parallel-out, output latches, output enable

|

| three-state

| 16

| SN74LS595

|-

| 74x596

| 1

| 8-bit shift registers, serial-in, parallel-out, output latches, output enable

|

| open-collector

| 16

| SN74LS596

|-

| 74x597

| 1

| 8-bit shift registers, parallel-in, serial-out, input latches

|

|

| 16

| SN74LS597

|-

| 74x598

| 1

| 8-bit shift register, selectable parallel-in/out input latches

|

| three-state

| 20

| SN74LS598

|-

| 74x599

| 1

| 8-bit shift registers, serial-in, parallel-out, output latches

|

| open-collector

| 16

| SN74LS599

|-

!

! Units !! Description !! Input !! Output !! Pins !! Datasheet

|-

| 74x600

| 1

| dynamic memory refresh controller, transparent and burst modes, for 4K or 16K dRAM

|

| three-state

| 20

| SN74LS600A

|-

| 74x601

| 1

| dynamic memory refresh controller, transparent and burst modes, for 64K dRAM

|

| three-state

| 20

| SN74LS601A

|-

| 74x602

| 1

| dynamic memory refresh controller, cycle steal and burst modes, for 4K or 16K dRAM

|

| three-state

| 20

| SN74LS602A

|-

| 74x603

| 1

| dynamic memory refresh controller, cycle steal and burst modes, for 64K dRAM

|

| three-state

| 20

| SN74LS603A

|-

| 74x604

| 1

| octal 2-input multiplexer, latch, high-speed

|

| three-state

| 28

| SN74LS604

|-

| 74x605

| 1

| octal 2-input multiplexer, latch, high-speed

|

| open-collector

| 28

| SN74LS605

|-

| 74x606

| 1

| octal 2-input multiplexer, latch, glitch-free

|

| three-state

| 28

| SN74LS606

|-

| 74x607

| 1

| octal 2-input multiplexer, latch, glitch-free

|

| open-collector

| 28

| SN74LS607

|-

| 74x608

| 1

| memory cycle controller

|

|

| 16

| SN74LS608

|-

| 74x610

| 1

| memory mapper, latched

|

| three-state

| 40

| SN74LS610

|-

| 74x611

| 1

| memory mapper, latched

|

| open-collector

| 40

| SN74LS611

|-

| 74x612

| 1

| memory mapper

|

| three-state

| 40

| SN74LS612

|-

| 74x613

| 1

| memory mapper

|

| open-collector

| 40

| SN74LS613

|-

| 74x614

| 1

| octal bus transceiver and register, inverting

|

| open-collector

| 24

| SN74ALS614

|-

| 74x615

| 1

| octal bus transceiver and register, non-inverting

|

| open-collector

| 24

| SN74ALS615

|-

| 74x616

| 1

| 16-bit parallel error detection and correction

|

| three-state

| 40

| SN74ALS616

|-

| 74x617

| 1

| 16-bit parallel error detection and correction

|

| open-collector

| 40

| SN74ALS617

|-

| 74x620

| 1

| octal bus transceiver, inverting

|

| three-state

| 20

| SN74LS620

|-

| 74x621

| 1

| octal bus transceiver, non-inverting

|

| open-collector

| 20

| SN74LS621

|-

| 74x622

| 1

| octal bus transceiver, inverting

|

| open-collector

| 20

| SN74LS622

|-

| 74x623

| 1

| octal bus transceiver, non-inverting

|

| three-state

| 20

| SN74LS623

|-

| 74x624

| 1

| voltage-controlled oscillator, enable control, range control, two-phase outputs

| analog

|

| 14

| SN74LS624

|-

| 74x625

| 2

| dual voltage-controlled oscillator, two-phase outputs

| analog

|

| 16

| SN74LS625

|-

| 74x626

| 2

| dual voltage-controlled oscillator, enable control, two-phase outputs

| analog

|

| 16

| SN74LS626

|-

| 74x627

| 2

| dual voltage-controlled oscillator

| analog

|

| 14

| SN74LS627

|-

| 74x628

| 1

| voltage-controlled oscillator, enable control, range control,<br/> external temperature compensation, two-phase outputs

| analog

|

| 14

| SN74LS628

|-

| 74x629

| 2

| dual voltage-controlled oscillator, enable control, range control

| analog

|

| 16

| SN74LS629

|-

| 74x630

| 1

| 16-bit error detection and correction (EDAC)

|

| three-state

| 28

| SN74LS630

|-

| 74x631

| 1

| 16-bit error detection and correction

|

| open-collector

| 28

| SN74LS631

|-

| 74x632

| 1

| 32-bit parallel error detection and correction, byte-write

|

| three-state

| 52

| SN74ALS632

|-

| 74x633

| 1

| 32-bit parallel error detection and correction, byte-write

|

| open-collector

| 52

| SN74ALS633

|-

| 74x634

| 1

| 32-bit parallel error detection and correction

|

| three-state

| 48

| SN74ALS634

|-

| 74x635

| 1

| 32-bit parallel error detection and correction

|

| open-collector

| 48

| SN74ALS635

|-

| 74x636

| 1

| 8-bit parallel error detection and correction

|

| three-state

| 20

| SN74LS636

|-

| 74x637

| 1

| 8-bit parallel error detection and correction

|

| open-collector

| 20

| SN74LS637

|-

| 74x638

| 1

| octal bus transceiver, inverting outputs

|

| three-state and open-collector

| 20

| SN74LS638

|-

| 74x639

| 1

| octal bus transceiver, non-inverting outputs

|

| three-state and open-collector

| 20

| SN74LS639

|-

| 74x640

| 1

| octal bus transceiver, inverting outputs

|

| three-state

| 20

| SN74LS640

|-

| 74x641

| 1

| octal bus transceiver, non-inverting outputs

|

| open-collector

| 20

| SN74LS641

|-

| 74x642

| 1

| octal bus transceiver, inverting outputs

|

| open-collector

| 20

| SN74LS642

|-

| 74x643

| 1

| octal bus transceiver, mix of inverting and non-inverting outputs

|

| three-state

| 20

| SN74LS643

|-

| 74x644

| 1

| octal bus transceiver, mix of inverting and non-inverting outputs

|

| open-collector

| 20

| SN74LS644

|-

| 74x645

| 1

| octal bus transceiver, non-inverting outputs

|

| three-state

| 20

| SN74LS645

|-

| 74x646

| 1

| octal bus transceiver/latch/multiplexer, non-inverting outputs

|

| three-state

| 24

| SN74ALS646A

|-

| 74x647

| 1

| octal bus transceiver/latch/multiplexer, non-inverting outputs

|

| open-collector

| 24

| SN74LS647

|-

| 74x648

| 1

| octal bus transceiver/latch/multiplexer, inverting outputs

|

| three-state

| 24

| SN74ALS648A

|-

| 74x649

| 1

| octal bus transceiver/latch/multiplexer, inverting outputs

|

| open-collector

| 24

| SN74LS649

|-

| 74x651

| 1

| octal bus transceiver/register, inverting outputs

|

| three-state

| 24

| SN74ALS651A

|-

| 74x652

| 1

| octal bus transceiver/register, non-inverting outputs

|

| three-state

| 24

| SN74ALS652A

|-

| 74x653

| 1

| octal bus transceiver/register, inverting outputs

|

| three-state and open-collector

| 24

| SN74ALS653

|-

| 74x654

| 1

| octal bus transceiver/register, non-inverting outputs

|

| three-state and open-collector

| 24

| SN74ALS654

|-

| 74x655

| 1

| octal buffer / line driver with parity, inverting

|

| three-state

| 24

| 74F655

|-

| 74x656

| 1

| octal buffer / line driver with parity, non-inverting

|

| three-state

| 24

| 74F656

|-

| 74x657

| 1

| octal bidirectional transceiver with 8-bit parity generator/checker

|

| three-state

| 24

| SN74F657

|-

| 74x658

| 1

| octal bus transceiver, parity, inverting

|

| three-state

| 24

| SN74HC658

|-

| 74x659

| 1

| octal bus transceiver, parity, non-inverting

|

| three-state

| 24

| SN74HC659

|-

| 74x664

| 1

| octal bus transceiver, parity, inverting

|

| three-state

| 24

| SN74HC664

|-

| 74x665

| 1

| octal bus transceiver, parity, non-inverting

|

| three-state

| 24

| SN74HC665

|-

| 74x666

| 1

| 8-bit D-type transparent read-back latch, non-inverting

|

| three-state

| 24

| SN74ALS666

|-

| 74x667

| 1

| 8-bit D-type transparent read-back latch, inverting

|

| three-state

| 24

| SN74ALS667

|-

| 74x668

| 1

| synchronous 4-bit decade up/down counter

|

|

| 16

| SN74LS668

|-

| 74x669

| 1

| synchronous 4-bit binary up/down counter

|

|

| 16

| SN74LS669

|-

| 74x670

| 1

| 16-bit register file (4x4)

|

| three-state

| 16

| SN74LS670

|-

| 74x671

| 1

| 4-bit bidirectional shift register/latch/multiplexer, direct clear

|

| three-state

| 20

| SN74LS671

|-

| 74x672

| 1

| 4-bit bidirectional shift register/latch/multiplexer, synchronous clear

|

| three-state

| 20

| SN74LS672

|-

| 74x673

| 1

| 16-bit serial-in, serial/parallel-out shift register, output storage registers

|

| three-state

| 24

| SN74LS673

|-

| 74x674

| 1

| 16-bit parallel-in, serial-out shift register

|

| three-state

| 24

| SN74LS674

|-

| 74x675

| 1

| 16-bit serial-in, serial/parallel-out shift register

|

|

| 24

| 74F675A

|-

| 74x676

| 1

| 16-bit serial/parallel-in, serial-out shift register

|

|

| 24

| 74F676

|-

| 74x677

| 1

| 16-bit address comparator, enable

|

|

| 24

| SN74ALS677

|-

| 74x678

| 1

| 16-bit address comparator, latch

|

|

| 24

| SN74ALS678

|-

| 74x679

| 1

| 12-bit address comparator, latch

|

|

| 20

| SN74ALS679

|-

| 74x680

| 1

| 12-bit address comparator, enable

|

|

| 20

| SN74ALS680

|-

| 74x681

| 1

| 4-bit parallel binary accumulator

|

| three-state

| 20

| SN74LS681

|-

| 74x682

| 1

| 8-bit magnitude comparator, P>Q output

| 20&nbsp;kΩ pull-up

|

| 20

| SN74LS682

|-

| 74x683

| 1

| 8-bit magnitude comparator, P>Q output

| 20&nbsp;kΩ pull-up

| open-collector

| 20

| SN74LS683

|-

| 74x684

| 1

| 8-bit magnitude comparator, P>Q output

|

|

| 20

| SN74LS684

|-

| 74x685

| 1

| 8-bit magnitude comparator, P>Q output

|

| open-collector

| 20

| SN74LS685

|-

| 74x686

| 1

| 8-bit magnitude comparator, P>Q output, enable

|

|

| 24

| SN74LS686

|-

| 74x687

| 1

| 8-bit magnitude comparator, P>Q output, enable

|

| open-collector

| 24

| SN74LS687

|-

| 74x688

| 1

| 8-bit magnitude comparator, enable

|

|

| 20

| SN74LS688

|-

| 74x689

| 1

| 8-bit magnitude comparator, enable

|

| open-collector

| 20

| SN74LS689

|-

| 74x690

| 1

| 4-bit decimal counter/latch/multiplexer, asynchronous clear

|

| three-state

| 20

| SN74LS690

|-

| 74x691

| 1

| 4-bit binary counter/latch/multiplexer, asynchronous clear

|

| three-state

| 20

| SN74LS691

|-

| 74x692

| 1

| 4-bit decimal counter/latch/multiplexer, synchronous clear

|

| three-state

| 20

| SN74LS692

|-

| 74x693

| 1

| 4-bit binary counter/latch/multiplexer, synchronous clear

|

| three-state

| 20

| SN74LS693

|-

| 74x694

| 1

| 4-bit decimal counter/latch/multiplexer, synchronous and asynchronous clears

|

| three-state

| 20

| SN74ALS694

|-

| 74x695

| 1

| 4-bit binary counter/latch/multiplexer, synchronous and asynchronous clears

|

| three-state

| 20

| SN74ALS695

|-

| 74x696

| 1

| 4-bit decimal counter/register/multiplexer, asynchronous clear

|

| three-state

| 20

| SN74LS696

|-

| 74x697

| 1

| 4-bit binary counter/register/multiplexer, asynchronous clear

|

| three-state

| 20

| SN74LS697

|-

| 74x698

| 1

| 4-bit decimal counter/register/multiplexer, synchronous clear

|

| three-state

| 20

| SN74LS698

|-

| 74x699

| 1

| 4-bit binary counter/register/multiplexer, synchronous clear

|

| three-state

| 20

| SN74LS699

|-

!

! Units !! Description !! Input !! Output !! Pins !! Datasheet

|-

| 74x700

| 1

| octal dRAM driver, inverting

|

| three-state

| 20

| SN74S700

|-

| 74x701

| 1

| 8-bit register/counter/comparator

|

| three-state

| 24

| 74F701

|-

| 74x702

| 1

| 8-bit registered read-back transceiver

|

| three-state

| 24

| 74F702

|-

| 74x705

| 1

| arithmetic logic unit for digital signal processing applications

|

| three-state

| (84)

| 74ACT705

|-

| 74x707

| 1

| 8-bit TTL-ECL shift register

|

|

| 20

| 74F707

|-

| 74x708

| 1

| 576-bit FIFO memory (64x9)

|

| three-state

| 28

| 74ACT708

|-

| 74x710

| 1

| 8-bit single-supply TTL-ECL shift register

|

|

| 20

| 74F710

|-

| 74x711

| 5

| quint 2-to-1 multiplexers

|

| three-state

| 20

| 74F711

|-

| 74x712

| 5

| quint 3-to-1 multiplexers

|

|

| 24

| 74F712

|-

| 74x715

| 1

| programmable video sync generator

|

|

| 20

| 74ACT715

|-

| 74x716

| 1

| programmable decade counter

|

|

| 16

| SN74LS716

|-

| 74x718

| 1

| programmable binary counter

|

|

| 16

| SN74LS718

|-

| 74x723

| 1

| 576-bit FIFO memory (64x9)

|

| three-state

| 28

| 74ACT723

|-

| 74x724

| 1

| voltage-controlled multivibrator

| analog

|

| 8

| SN74LS724

|-

| 74x725

| 1

| 4608-bit FIFO memory (512x9)

|

| three-state

| 28

| 74ACT725

|-

| 74x730

| 1

| octal dRAM driver, inverting

|

| three-state

| 20

| SN74S730

|-

| 74x731

| 1

| octal dRAM driver, non-inverting

|

| three-state

| 20

| SN74S731

|-

| 74x732

| 1

| 4-bit 3-bus multiplexer, inverting

|

| three-state

| 20

| 74F732

|-

| 74x733

| 1

| 4-bit 3-bus multiplexer, non-inverting

|

| three-state

| 20

| 74F733

|-

| 74x734

| 1

| octal dRAM driver, non-inverting

|

| three-state

| 20

| SN74S734

|-

| 74x740

| 2

| dual 4-bit line driver, inverting

|

| three-state

| 20

| SN74S740

|-

| 74x741

| 2

| dual 4-bit line driver, non-inverting, complementary enable inputs

|

| three-state

| 20

| SN74S741

|-

| 74x742

| 1

| octal line driver, inverting

|

| open-collector

| 20

| SN74ALS742

|-

| 74x743

| 1

| octal line driver, non-inverting

|

| open-collector

| 20

| SN74ALS743 there has been an ongoing trend towards one / two / three logic gates per chip. Now logic can be placed where it is physically needed on a board, instead of running long signal traces to a full-size logic chip that has many of the same gate.

All chips in the following sections are available 5- to 10-pin surface-mount packages. The right digits, after the 1G/2G/3G, typically has the same functional features as older legacy chips, except for the multifunctional chips and 4-digit chip numbers, which are unique to these newer families. The "x" in the part number is a place holder for the logic family name. For example, 74x1G14 in "LVC" logic family would be "74LVC1G14". The previously stated prefixes of "SN-" and "MC-" are used to denote manufacturers, Texas Instruments and ON Semiconductor respectively.

Some of the manufacturers that make these smaller IC chips are: Diodes Incorporated, Nexperia (NXP Semiconductors), ON Semiconductor (Fairchild Semiconductor), Texas Instruments (National Semiconductor), Toshiba.