IA-32 (short for "Intel Architecture, 32-bit", commonly called i386 as a result, the "IA-32" term may be used as a metonym to refer to all x86 versions that support 32-bit computing. Windows Server (up to Windows Server 2008) and the Debian Linux distribution. In spite of IA-32's name (and causing some potential confusion), the 64-bit evolution of x86 that originated out of AMD would not be known as "IA-64", that name instead belonging to Intel's discontinued Itanium architecture.
Architectural features
The primary defining characteristic of IA-32 is the availability of 32-bit general-purpose processor registers (for example, EAX and EBX), 32-bit integer arithmetic and logical operations, 32-bit offsets within a segment in protected mode, and the translation of segmented addresses to 32-bit linear addresses. The designers took the opportunity to make other improvements as well. Some of the most significant changes (relative to the 16-bit 286 instruction set) are:
; 32-bit integer capability: All general-purpose registers (GPRs) are expanded from 16 bits to 32 bits, and all arithmetic and logical operations, memory-to-register and register-to-memory operations, etc., can operate directly on 32-bit integers. Pushes and pops on the stack default to 4-byte strides, and non-segmented pointers are 4 bytes wide.
; More general addressing modes: Any GPR can be used as a base register, and any GPR other than ESP can be used as an index register, in a memory reference. The index register value can be multiplied by 1, 2, 4, or 8 before being added to the base register value and displacement.
; Additional segment registers: Two additional segment registers, FS and GS, are provided.
; Larger virtual address space: The IA-32 architecture defines a 48-bit segmented address format, with a 16-bit segment number and a 32-bit offset within the segment. Segmented addresses are mapped to 32-bit linear addresses.
; Demand paging: 32-bit linear addresses are virtual addresses rather than physical addresses; they are translated to physical addresses through a page table. In the 80386, 80486, and the original Pentium processors, the physical address was 32 bits; in the Pentium Pro and later processors, the Physical Address Extension allowed 36-bit physical addresses, although the linear address size was still 32 bits.
Operating modes
{| class="wikitable"
|-
! Operating mode
! Operating system required
! Type of code being run
! Default address size
! Default operand size
! Typical GPR width
|-
| rowspan="2" | Protected mode
| 32-bit operating system or boot loader
| 32-bit protected-mode code
| 32 bits
| 32 bits
| 32 bits
|-
| 16-bit protected-mode operating system or boot loader, or 32-bit boot loader
| 16-bit protected-mode code
| 16 bits
| 16 bits
| 16 or 32 bits
|-
| Virtual 8086 mode
| 16- or 32-bit protected-mode operating system
| 16-bit real-mode code
| 16 bits
| 16 bits
| 16 or 32 bits
|-
| Real mode
| 16-bit real-mode operating system or boot loader, or 32-bit boot loader
| 16-bit real-mode code
| 16 bits
| 16 bits
| 16 or 32 bits
|-
| Unreal mode
| 16-bit real-mode operating system or boot loader, or 32-bit boot loader
| 16-bit real-mode code
| 32 bits
| 16 bits
| 16 or 32 bits
|}
See also
- x86-64
- IA-64
- List of former IA-32 compatible processor manufacturers
- Speculative execution CPU vulnerabilities